Motherboard says PCIe 3.0, but chipset only supports PCIe 2.0. Who's right?












4















As part of integration testing for our product, we received a client machine with a Supermicro X10DRi motherboard in it, with 2 Xeon E5-2620 v4 CPUs and a Quadro P5000. That motherboard is using the Intel C612 chipset.



While doing basic research for the integration, I noticed that the motherboard specs say it has 3X PCIe 3.0 x16 and 3X PCIe 3.0 x8 slots. However, the C612 chipset apparently only supports PCIe 2.0, and only up to x4 connections.



While the machine does work, I would like to know if we are taking full advantage of the Quadro. I currently believe that we are limited by the maximum speed of the chipset, as it controls the speed of communication between the CPUs and the GPU.




  1. Am I correct in that belief?

  2. Is there something I am missing/unaware
    of/incorrect about relating to the communication between the CPU and
    GPU, whereby the chipset is not a limiting factor?

  3. Is there a way to test the speed of the connection to the GPU?






graphics-card motherboard pci-express chipset







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    4















    As part of integration testing for our product, we received a client machine with a Supermicro X10DRi motherboard in it, with 2 Xeon E5-2620 v4 CPUs and a Quadro P5000. That motherboard is using the Intel C612 chipset.



    While doing basic research for the integration, I noticed that the motherboard specs say it has 3X PCIe 3.0 x16 and 3X PCIe 3.0 x8 slots. However, the C612 chipset apparently only supports PCIe 2.0, and only up to x4 connections.



    While the machine does work, I would like to know if we are taking full advantage of the Quadro. I currently believe that we are limited by the maximum speed of the chipset, as it controls the speed of communication between the CPUs and the GPU.




    1. Am I correct in that belief?

    2. Is there something I am missing/unaware
      of/incorrect about relating to the communication between the CPU and
      GPU, whereby the chipset is not a limiting factor?

    3. Is there a way to test the speed of the connection to the GPU?






    graphics-card motherboard pci-express chipset







    share|improve this question







    New contributor




    William Handrigan is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
    Check out our Code of Conduct.























      4












      4








      4








      As part of integration testing for our product, we received a client machine with a Supermicro X10DRi motherboard in it, with 2 Xeon E5-2620 v4 CPUs and a Quadro P5000. That motherboard is using the Intel C612 chipset.



      While doing basic research for the integration, I noticed that the motherboard specs say it has 3X PCIe 3.0 x16 and 3X PCIe 3.0 x8 slots. However, the C612 chipset apparently only supports PCIe 2.0, and only up to x4 connections.



      While the machine does work, I would like to know if we are taking full advantage of the Quadro. I currently believe that we are limited by the maximum speed of the chipset, as it controls the speed of communication between the CPUs and the GPU.




      1. Am I correct in that belief?

      2. Is there something I am missing/unaware
        of/incorrect about relating to the communication between the CPU and
        GPU, whereby the chipset is not a limiting factor?

      3. Is there a way to test the speed of the connection to the GPU?






      graphics-card motherboard pci-express chipset







      share|improve this question







      New contributor




      William Handrigan is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
      Check out our Code of Conduct.












      As part of integration testing for our product, we received a client machine with a Supermicro X10DRi motherboard in it, with 2 Xeon E5-2620 v4 CPUs and a Quadro P5000. That motherboard is using the Intel C612 chipset.



      While doing basic research for the integration, I noticed that the motherboard specs say it has 3X PCIe 3.0 x16 and 3X PCIe 3.0 x8 slots. However, the C612 chipset apparently only supports PCIe 2.0, and only up to x4 connections.



      While the machine does work, I would like to know if we are taking full advantage of the Quadro. I currently believe that we are limited by the maximum speed of the chipset, as it controls the speed of communication between the CPUs and the GPU.




      1. Am I correct in that belief?

      2. Is there something I am missing/unaware
        of/incorrect about relating to the communication between the CPU and
        GPU, whereby the chipset is not a limiting factor?

      3. Is there a way to test the speed of the connection to the GPU?






      graphics-card motherboard pci-express chipset




      graphics-card motherboard pci-express chipset






      share|improve this question







      New contributor




      William Handrigan is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
      Check out our Code of Conduct.











      share|improve this question







      New contributor




      William Handrigan is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
      Check out our Code of Conduct.









      share|improve this question




      share|improve this question






      New contributor




      William Handrigan is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
      Check out our Code of Conduct.









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      William HandriganWilliam Handrigan

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      New contributor




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      New contributor





      William Handrigan is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
      Check out our Code of Conduct.






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      Check out our Code of Conduct.






















          1 Answer
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          8














          Your CPU has 40 PCIe 3.0 lanes: Intel® Xeon® Processor E5-2620 v4



          enter image description here



          The communications with your GPUs will be direct from your CPU. This is good, after all the memory controller is also integrated on the CPU meaning that the fastest route for data in memory is from RAM -> CPU -> GPU rather than RAM - CPU -> Chipset -> GPU



          The motherboard connects the PCIe connections from the CPU to GPU, but that does not mean that they need to pass through the chipset. They go direct from the CPU to the CPU served PCIe slots.



          Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller. Possibly even USB3 or Gigabit Ethernet. How it is wired up and what to is down to the motherboard designer.



          Found your effective chipset/CPU/GPU layout on the Intel page for that chipset:



          enter image description here






          share|improve this answer





















          • 1





            I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

            – William Handrigan
            2 hours ago






          • 1





            I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

            – Mokubai♦
            2 hours ago






          • 1





            Perfect. Thanks for your concise, timely response!

            – William Handrigan
            2 hours ago






          • 2





            @WilliamHandrigan I found the Intel technical page that shows the effective layout.

            – Mokubai♦
            2 hours ago











          Your Answer








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          1 Answer
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          1 Answer
          1






          active

          oldest

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          active

          oldest

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          active

          oldest

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          8














          Your CPU has 40 PCIe 3.0 lanes: Intel® Xeon® Processor E5-2620 v4



          enter image description here



          The communications with your GPUs will be direct from your CPU. This is good, after all the memory controller is also integrated on the CPU meaning that the fastest route for data in memory is from RAM -> CPU -> GPU rather than RAM - CPU -> Chipset -> GPU



          The motherboard connects the PCIe connections from the CPU to GPU, but that does not mean that they need to pass through the chipset. They go direct from the CPU to the CPU served PCIe slots.



          Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller. Possibly even USB3 or Gigabit Ethernet. How it is wired up and what to is down to the motherboard designer.



          Found your effective chipset/CPU/GPU layout on the Intel page for that chipset:



          enter image description here






          share|improve this answer





















          • 1





            I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

            – William Handrigan
            2 hours ago






          • 1





            I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

            – Mokubai♦
            2 hours ago






          • 1





            Perfect. Thanks for your concise, timely response!

            – William Handrigan
            2 hours ago






          • 2





            @WilliamHandrigan I found the Intel technical page that shows the effective layout.

            – Mokubai♦
            2 hours ago
















          8














          Your CPU has 40 PCIe 3.0 lanes: Intel® Xeon® Processor E5-2620 v4



          enter image description here



          The communications with your GPUs will be direct from your CPU. This is good, after all the memory controller is also integrated on the CPU meaning that the fastest route for data in memory is from RAM -> CPU -> GPU rather than RAM - CPU -> Chipset -> GPU



          The motherboard connects the PCIe connections from the CPU to GPU, but that does not mean that they need to pass through the chipset. They go direct from the CPU to the CPU served PCIe slots.



          Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller. Possibly even USB3 or Gigabit Ethernet. How it is wired up and what to is down to the motherboard designer.



          Found your effective chipset/CPU/GPU layout on the Intel page for that chipset:



          enter image description here






          share|improve this answer





















          • 1





            I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

            – William Handrigan
            2 hours ago






          • 1





            I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

            – Mokubai♦
            2 hours ago






          • 1





            Perfect. Thanks for your concise, timely response!

            – William Handrigan
            2 hours ago






          • 2





            @WilliamHandrigan I found the Intel technical page that shows the effective layout.

            – Mokubai♦
            2 hours ago














          8












          8








          8







          Your CPU has 40 PCIe 3.0 lanes: Intel® Xeon® Processor E5-2620 v4



          enter image description here



          The communications with your GPUs will be direct from your CPU. This is good, after all the memory controller is also integrated on the CPU meaning that the fastest route for data in memory is from RAM -> CPU -> GPU rather than RAM - CPU -> Chipset -> GPU



          The motherboard connects the PCIe connections from the CPU to GPU, but that does not mean that they need to pass through the chipset. They go direct from the CPU to the CPU served PCIe slots.



          Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller. Possibly even USB3 or Gigabit Ethernet. How it is wired up and what to is down to the motherboard designer.



          Found your effective chipset/CPU/GPU layout on the Intel page for that chipset:



          enter image description here






          share|improve this answer















          Your CPU has 40 PCIe 3.0 lanes: Intel® Xeon® Processor E5-2620 v4



          enter image description here



          The communications with your GPUs will be direct from your CPU. This is good, after all the memory controller is also integrated on the CPU meaning that the fastest route for data in memory is from RAM -> CPU -> GPU rather than RAM - CPU -> Chipset -> GPU



          The motherboard connects the PCIe connections from the CPU to GPU, but that does not mean that they need to pass through the chipset. They go direct from the CPU to the CPU served PCIe slots.



          Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller. Possibly even USB3 or Gigabit Ethernet. How it is wired up and what to is down to the motherboard designer.



          Found your effective chipset/CPU/GPU layout on the Intel page for that chipset:



          enter image description here







          share|improve this answer














          share|improve this answer



          share|improve this answer








          edited 2 hours ago

























          answered 2 hours ago









          Mokubai♦Mokubai

          57.3k16135154




          57.3k16135154








          • 1





            I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

            – William Handrigan
            2 hours ago






          • 1





            I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

            – Mokubai♦
            2 hours ago






          • 1





            Perfect. Thanks for your concise, timely response!

            – William Handrigan
            2 hours ago






          • 2





            @WilliamHandrigan I found the Intel technical page that shows the effective layout.

            – Mokubai♦
            2 hours ago














          • 1





            I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

            – William Handrigan
            2 hours ago






          • 1





            I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

            – Mokubai♦
            2 hours ago






          • 1





            Perfect. Thanks for your concise, timely response!

            – William Handrigan
            2 hours ago






          • 2





            @WilliamHandrigan I found the Intel technical page that shows the effective layout.

            – Mokubai♦
            2 hours ago








          1




          1





          I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

          – William Handrigan
          2 hours ago





          I understand the CPU can support more lanes, but does not the chipset actually define those lanes? In other words, do the lanes go from the CPUs, through the chipset, and then on to the GPU?

          – William Handrigan
          2 hours ago




          1




          1





          I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

          – Mokubai♦
          2 hours ago





          I've added details. The motherboard holds the PCIe connections from CPU to GPU, but they do not need to pass through the chipset. They are direct from the CPU to the CPU served PCIe slots. Somewhere in your motherboard documentation it should tell you if any of the PCIe slots are served by chipset or CPU. Chances are the chipset PCIe lanes are used to serve an m.2 slot or SATA controller.

          – Mokubai♦
          2 hours ago




          1




          1





          Perfect. Thanks for your concise, timely response!

          – William Handrigan
          2 hours ago





          Perfect. Thanks for your concise, timely response!

          – William Handrigan
          2 hours ago




          2




          2





          @WilliamHandrigan I found the Intel technical page that shows the effective layout.

          – Mokubai♦
          2 hours ago





          @WilliamHandrigan I found the Intel technical page that shows the effective layout.

          – Mokubai♦
          2 hours ago










          William Handrigan is a new contributor. Be nice, and check out our Code of Conduct.










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